1. Field of the Invention
Embodiments of the present invention relate to a method and apparatus for planarizing a surface and, more particularly, to a method for controlling the removal or polishing profile in electrochemically assisted chemical mechanical polishing (CMP).
2. Background of the Related Art
Sub-quarter micron multi-level metallization is one of the key technologies for the next generation of ultra large-scale integration (ULSI). The multilevel interconnects that lie at the heart of this technology require planarization of interconnect features formed in high aspect ratio apertures, including contacts, vias, lines and other features. Reliable formation of these interconnect features is very important to the success of ULSI and to the continued effort to increase circuit density and quality on individual substrates and die.
In the fabrication of integrated circuits and other electronic devices, multiple layers of conducting, semiconducting, and dielectric materials are deposited on or removed from a surface of a substrate. Thin layers of conducting, semiconducting, and dielectric materials may be deposited by a number of deposition techniques. Common deposition techniques in modern processing include physical vapor deposition (PVD), also known as sputtering, chemical vapor deposition (CVD), plasma-enhanced chemical vapor deposition (PECVD), and electrochemical plating (ECP).
As layers of materials are sequentially deposited and removed, the uppermost surface of the substrate may become non-planar across its surface and require planarization. “Planarizing” a surface, or “polishing” a surface, is a process where material is removed from the surface of the substrate to form a generally even, planar surface. Planarization is useful in removing undesired surface topography and surface defects, such as agglomerated materials, crystal lattice damage, scratches, and contaminated layers or materials. Planarization is also useful in forming features on a substrate by removing excess deposited material used to fill the features and to provide an even surface for subsequent levels of metallization and processing.
Chemical mechanical polishing (CMP) is a common technique used to planarize substrates. CMP utilizes a chemical composition, typically a slurry or other fluid medium, for selective removal of material from substrates. In conventional CMP techniques, a substrate carrier or polishing head is mounted on a carrier assembly and positioned in contact with a polishing pad in a CMP apparatus. The carrier assembly provides a controllable pressure to the substrate urging the substrate against the polishing pad. The pad is moved relative to the substrate by an external driving force. The CMP apparatus effects polishing or rubbing movement between the surface of the substrate and the polishing pad while dispersing a polishing composition to effect chemical activity and/or mechanical activity and consequential removal of material from the surface of the substrate.
One material increasingly utilized in integrated circuit fabrication is copper due to its desirable electrical properties. However, copper has its own special fabrication problems. Copper material is removed at different removal rates along the different surface topography of the substrate surface, which makes effective removal of copper material from the substrate surface and planarity of the substrate surface difficult to achieve.
One solution for polishing copper is by polishing copper by electrochemical mechanical polishing (ECMP) techniques. ECMP techniques remove conductive material from a substrate surface by electrochemical dissolution while concurrently polishing the substrate with reduced mechanical abrasion compared to conventional CMP processes. The electrochemical dissolution is performed by applying an electrical bias between an electrode and a substrate surface to remove conductive materials from a substrate surface into a surrounding electrolyte. During electrochemical dissolution, the substrate typically is placed in motion relative to a polishing pad to enhance the removal of material from the surface of the substrate. In one embodiment of an ECMP system, the electrical bias is applied by a ring of conductive contacts in electrical communication with the substrate surface in a substrate support device, such as a substrate carrier head. In other ECMP systems, a bias is applied between an electrode and conductive pad that is in contact with the substrate surface. Unfortunately, these conventional ECMP systems fail to provide a method for adjusting and controlling the polishing profile across the surface of the substrate to be polished during the ECMP process.
As a result, there is a need for a method and apparatus for controlling the polishing profile (i.e., polishing rate) during ECMP.